In recent years, a stacked semiconductor memory device has been proposed in which memory cells are integrated three-dimensionally. In such a semiconductor memory device, a stacked body in which multiple electrode layers are stacked is provided; and channels that pierce the stacked body are provided. Also, memory cells that include a charge storage film are formed at the crossing portions of the electrode layers and the channels. The electrode layers function as control gates of the memory cells and are formed using a conductive material. When the electrode layers are formed using a metal, stress such as compressive stress, tensile stress, or the like is generated in the electrode layers. By the electrode layers being formed to be long in one direction, there is a risk of the warp of the wafer becoming large due to such stress.